R1LP0408CSP-5SC_技术文档_静态存储器_4M SRAM( 512千字】 8位)的...

来自 : www.icpdf.com/RENESAS_datashee 发布时间：2021-03-25

R1LP0408C-C Series4M SRAM (512-kword×8-bit)REJ03C0077-0200ZRev. 2.00May.26.2004DescriptionThe R1LP0408C-C is a 4-Mbit static RAM organized 512-kword×8-bit. R1LP0408C-C Series hasrealized higher density, higher performance and low power consumption by employing CMOS processtechnology (6-transistor memory cell). The R1LP0408C-C Series offers low power standby powerdissipation; therefore, it is suitable for battery backup systems. It has packaged in 32-pin SOP, 32-pinTSOP II.Features•Single 5 V supply: 5 V±10%•Access time: 55/70 ns (max)•Power dissipation:Active: 10 mW/MHz (typ)Standby: 4µW(typ)•Completely static memory.No clock or timing strobe required•Equal access and cycle times•Common data input and output.Three state output•Directly TTL compatible.All inputs and outputs•Battery backup operation.•Operating temperature:−20to +70°CRev.2.00, May.26.2004, page 1 of 12R1LP0408C-C SeriesOrdering InformationType No.R1LP0408CSP-5SCR1LP0408CSP-7LCR1LP0408CSB-5SCR1LP0408CSB-7LCR1LP0408CSC-5SCR1LP0408CSC-7LCAccess time55 ns70 ns55 ns70 ns55 ns70 ns400-mil 32-pin plastic TSOP II reverse (32P3Y-J)400-mil 32-pin plastic TSOP II (32P3Y-H)Package525-mil 32-pin plastic SOP (32P2M-A)Rev.2.00, May.26.2004, page 2 of 12R1LP0408C-C SeriesPin Arrangement32-pin SOP32-pin TSOPA18A16A14A12A7A6A5A4A3A2A1A0I/O0I/O1I/O2VSS12345678910111213141516(Top view)32313029282726252423222120191817VCCA15A17WE#A13A8A9A11OE#A10CS#I/O7I/O6I/O5I/O4I/O3VCCA15A17WE#A13A8A9A11OE#A10CS#I/O7I/O6I/O5I/O4I/O332-pin TSOP (reverse)32313029282726252423222120191817(Top view)12345678910111213141516A18A16A14A12A7A6A5A4A3A2A1A0I/O0I/O1I/O2VSSPin DescriptionPin nameA0 to A18I/O0 to I/O7CS# (CS)OE# (OE)WE# (WE)VCCVSSFunctionAddress inputData input/outputChip selectOutput enableWrite enablePower supplyGroundRev.2.00, May.26.2004, page 3 of 12R1LP0408C-C SeriesBlock DiagramLSBVCCVSS•••••MSBA11A9A8A15A18A10A13A17A16A14A12RowDecoderMemory Matrix2,048×2,048I/O0InputDataControlI/O7••Column I/OColumn Decoder••LSB A3 A2A1A0 A4 A5 A6 A7 MSB••CS#WE#OE#Timing Pulse GeneratorRead/Write ControlRev.2.00, May.26.2004, page 4 of 12R1LP0408C-C SeriesOperation TableWE#×HHLLCS#HLLLLOE#×HLHLModeNot selectedOutput disableReadWriteWriteVCCcurrentISB, ISB1ICCICCICCICCI/O0 to I/O7High-ZHigh-ZDoutDinDinRef. cycleRead cycleWrite cycle (1)Write cycle (2)Note: H: VIH, L: VIL,×:VIHor VILAbsolute Maximum RatingsParameterPower supply voltage relative to VSSTerminal voltage on any pin relative to VSSPower dissipationOperating temperatureStorage temperature rangeStorage temperature range under biasSymbolVCCVTPTToprTstgTbiasValue−0.5to +7.0−0.5*to VCC+ 0.3*0.7−20to +70−65to +150−20to +8512UnitVVW°C°C°CNotes: 1. VTmin:−3.0V for pulse half-width≤30 ns.2. Maximum voltage is +7.0 V.DC Operating Conditions(Ta =−20to +70°C)ParameterSupply voltageSymbolVCCVSSInput high voltageInput low voltageNote:VIHVILMin4.502.2−0.3*1Typ5.00Max5.50VCC+ 0.30.8UnitVVVV1. VILmin:−3.0V for pulse half-width≤30 ns.Rev.2.00, May.26.2004, page 5 of 12